
Various things to look out for, or they might bite you in the rear as well...

GAS
---

* Beware of alignment. No automatic alignment is done. Ever.
  And warnings are not given on misaligned references:

  MOV.W/MOV.L/MOVA with (xx,pc) operands require the address to be
  word/longword-aligned. The assembler will not issue any warnings.

  Code must be word-aligned. Always align code/data that follows after
  string constants!


Caches
------

* Changing CCN::CCR should only be done by code running in the non-cached
  P2 area (address 0xa.......). After writing to CCR, wait 8 instructions
  before accessing or jumping to any other area.
  (See SH4 PM 4.2 for details.)

* If you want to clear & disable the OC, remember to first write it
  back, then invalidate it, and *then* disable it.


Interrupts
----------

* An exception/interrupt handler should not jump during its first
  instruction; if it does so, then the value saved in SPC will be wrong.
  (SPC will be set to the address of the instruction following the
   branch, instead of the PC before the exception was taken.)

* Inside an interrupt handler, the interrupt source should be cleared
  at least 19 cycles before BL is set to 0 or an RTE is executed,
  otherwise the interrupt can accidentally be re-triggered (according
  to SH4 HWM 19.4.1).
  This has not been verified.


TA / 3D
-------

* The PP-block matrix must be located somewhere *after* the PP-block
  allocation area start in memory,  otherwise the PP matrix will not be
  written out to memory. (It's probably the overflow-check for the
  PP-block allocation area that is erroneously triggered.)

* Outputting an empty list to TA will make it very unhappy.

* Vertical output compression requires the tiles in the Tile Array
  to be stored in column-major order (top-down, left-right).

