| Periph ID AIC | Symbol | Description |
|---|---|---|
| 0 | (AT91C_ID_FIQ) | Advanced Interrupt Controller (FIQ) |
| 29 | (AT91C_ID_IRQ0) | Advanced Interrupt Controller (IRQ0) |
| 30 | (AT91C_ID_IRQ1) | Advanced Interrupt Controller (IRQ1) |
| 31 | (AT91C_ID_IRQ2) | Advanced Interrupt Controller (IRQ2) |
| Signal | Symbol | PIO controller | Description |
|---|---|---|---|
| IRQ0 | (AT91C_PC2_IRQ0 ) | PIOC Periph: B Bit: 2 | Interrupt input 0 |
| IRQ1 | (AT91C_PB30_IRQ1 ) | PIOB Periph: B Bit: 30 | Interrupt input 1 |
| IRQ2 | (AT91C_PB29_IRQ2 ) | PIOB Periph: B Bit: 29 | Interrupt input 2 |
| Function | Description |
|---|---|
| AT91F_AIC_CfgPIO | Configure PIO controllers to drive AIC signals |
| AT91F_AIC_CfgPMC | Enable Peripheral clock in PMC for AIC |
| Offset | Field | Description |
|---|---|---|
| 0x0 | AIC_SMR[32] (AIC_SMR) | Source Mode Register |
| 0x80 | AIC_SVR[32] (AIC_SVR) | Source Vector Register |
| 0x100 | AIC_IVR | IRQ Vector Register |
| 0x104 | AIC_FVR | FIQ Vector Register |
| 0x108 | AIC_ISR | Interrupt Status Register |
| 0x10C | AIC_IPR | Interrupt Pending Register |
| 0x110 | AIC_IMR | Interrupt Mask Register |
| 0x114 | AIC_CISR | Core Interrupt Status Register |
| 0x120 | AIC_IECR | Interrupt Enable Command Register |
| 0x124 | AIC_IDCR | Interrupt Disable Command Register |
| 0x128 | AIC_ICCR | Interrupt Clear Command Register |
| 0x12C | AIC_ISCR | Interrupt Set Command Register |
| 0x130 | AIC_EOICR | End of Interrupt Command Register |
| 0x134 | AIC_SPU | Spurious Vector Register |
| 0x138 | AIC_DCR | Debug Control Register (Protect) |
| 0x140 | AIC_FFER | Fast Forcing Enable Register |
| 0x144 | AIC_FFDR | Fast Forcing Disable Register |
| 0x148 | AIC_FFSR | Fast Forcing Status Register |
| Function | Description |
|---|---|
| AT91F_AIC_SetExceptionVector | Configure vector handler |
| AT91F_AIC_ClearIt | Clear corresponding IT number |
| AT91F_AIC_Trig | Trig an IT |
| AT91F_AIC_Open | Set exception vectors and AIC registers to default values |
| AT91F_AIC_DisableIt | Disable corresponding IT number |
| AT91F_AIC_AcknowledgeIt | Acknowledge corresponding IT number |
| AT91F_AIC_ConfigureIt | Interrupt Handler Initialization |
| AT91F_AIC_EnableIt | Enable corresponding IT number |
| AT91F_AIC_IsActive | Test if an IT is active |
| AT91F_AIC_IsPending | Test if an IT is pending |
| Offset | Name | Description | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2..0 | AIC_PRIOR AT91C_AIC_PRIOR | Priority Level Program the priority level for all sources except source 0 (FIQ). The priority level can be between 0 (lowest) and 7 (highest). The priority level is not used for the FIQ, in the SMR0.
| |||||||||||||||
| 6..5 | AIC_SRCTYPE AT91C_AIC_SRCTYPE | Interrupt Source Type Program the input to be positive or negative edge-triggered or positive or negative level sensitive. The active level or edge is not programmable for the internal sources.
|
| Offset | Name | Description |
|---|---|---|
| 0 | AIC_NFIQ AT91C_AIC_NFIQ | NFIQ Status 0 = NFIQ line inactive. 1 = NFIQ line active. |
| 1 | AIC_NIRQ AT91C_AIC_NIRQ | NIRQ Status 0 = NIRQ line inactive. 1 = NIRQ line active. |
| Offset | Name | Description |
|---|---|---|
| 0 | AIC_DCR_PROT AT91C_AIC_DCR_PROT | Protection Mode 0: The protection Mode is disabled 1: The Protection mode is enabled |
| 1 | AIC_DCR_GMSK AT91C_AIC_DCR_GMSK | General Mask 0: The nIRQ qnd nFIQ lines are normally controled by the AIC 1: The nIRQ and nFIQ lines are tied to their inactive mode |